What is the difference between an ARM architecture and an X86 architecture ?

The main difference between the two architectures is in the choice of design of their instruction set : the x86 architecture is a CISC (Complex Instruction Set Computer) architecture, while the ARM is a RISC (Reduced ISC) architecture.

What is the difference between an ARM architecture and an X86 architecture ?

The main difference between the two architectures is in the choice of design of their instruction set : the x86 architecture is a CISC (Complex Instruction Set Computer) architecture, while the ARM is a RISC (Reduced ISC) architecture.

This means that ARM chips only support simple, fixed-size instructions (4 bytes for the standard ARM instruction set, 2 bytes for the reduced Thumb set), executing in a constant number of cycles, Conversely x86 chips that provide instructions that take more cycles than others to perform some complex tasks.

ARM chips also support fewer addressing modes (the way to reference data in an instruction), most instructions can only work with the data present in a register (small areas of memory built into the processor), while the majority of x86 instructions can fetch data directly from memory.

 

The interest of a RISC architecture is located mainly in the slightest complexity of the electronic diagram of the chip: to achieve the same level of performance, it generally requires fewer transistors, which reduces production costs and improves thermal efficiency.

Due to the requirement to make explicit memory accesses in the code, RISC processors are also often equipped with a greater number of registers, which makes it possible to reduce the frequency of memory accesses. Thus, the ARMv7 architecture has 15 main registers, and the ARMv8 architecture has 31, while the x86 has only 8 for 16/32/64-bit code and 8 additional reserved for 64-bit code.

 

CISC architectures have the advantage of allowing more compact executable code, thereby reducing the number of memory accesses. Otherwise, even if they take longer to execute than simple instructions, some specialized instructions can execute much faster than their equivalent in simple instructions. On the other hand, the instruction decoding stage is more complex, since it must be able to interpret a large number of instructions, of very variable sizes (the shortest are only one byte, but the longest border the 20 bytes) and manage advanced addressing modes, requiring arithmetic operations to determine the addresses. For example, one of the x86 addressing modes allows the use of addresses of the form R1 + R2 * C1 + C2 or R1 and R2 are the contents of two registers and C1 and C2 two constants integrated directly into the code of instruction.

 

Note that in practice today x86 processors have a heart internal execution closer to a RISC that a CISC architecture, associated with an instruction decoding stage which is responsible for converting the x86 instruction stream into simpler internal instructions. These processors remain CISC processors, due to their internal interface, but the use of an internal RISC architecture reduces the complexity of the execution units.

 

On the Other Hand, ARM processors (and many other RISC processors) have adopted specialized instructions, notably for multimedia processing, via extensions to the basic instruction set, such as the NEON extension.

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